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authorFabio Estevam <fabio.estevam@nxp.com>2016-06-06 04:00:47 +0200
committerShawn Guo <shawnguo@kernel.org>2016-06-11 11:36:10 +0200
commitf1472f82cc4d2dd747dc3e5e9c7e0ae3d3911922 (patch)
tree101d4088e2f724df3cdd89f388cdf2ec84f36f25 /arch/arm/boot/dts/imx6qdl-sabresd.dtsi
parentARM: dts: imx6q-cm-fx6: Relicense under GPLv2/X11 (diff)
downloadlinux-f1472f82cc4d2dd747dc3e5e9c7e0ae3d3911922.tar.xz
linux-f1472f82cc4d2dd747dc3e5e9c7e0ae3d3911922.zip
ARM: dts: imx6qdl-sabresd: Pass the correct PCI reset polarity
The PCI reset GPIO is active low, so represent it with the GPIO_ACTIVE_LOW flag. Even though the imx6 PCI driver will not take the polarity into account in this case, it is better to provide a correct description in device-tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 5248e7bd2b06..bea707f0646a 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -533,7 +533,7 @@
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio7 12 0>;
+ reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
status = "okay";
};