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author | Lothar Waßmann <LW@KARO-electronics.de> | 2017-10-17 11:17:59 +0200 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2017-10-23 02:19:46 +0200 |
commit | 038ab100c3d02b4055d4d92c6d316ea851f2e474 (patch) | |
tree | d26e1decbfa829b7c2b7a54329dd0645d1a6e49f /arch/arm/boot/dts/imx6qdl-tx6.dtsi | |
parent | ARM: dts: imx6-tx6: convert to using simple-audio-card (diff) | |
download | linux-038ab100c3d02b4055d4d92c6d316ea851f2e474.tar.xz linux-038ab100c3d02b4055d4d92c6d316ea851f2e474.zip |
ARM: dts: imx6-tx6: add support for I2C bus recovery
Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-tx6.dtsi | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index eb5accd2d1a1..c1404020581c 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -311,8 +311,11 @@ }; &i2c1 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; @@ -325,8 +328,11 @@ }; &i2c3 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; @@ -552,6 +558,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1-gpiogrp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 @@ -559,6 +572,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3-gpiogrp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1 |