diff options
| author | Maciej S. Szmigiero <mail@maciej.szmigiero.name> | 2017-11-27 23:22:28 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2017-12-26 09:15:44 +0100 |
| commit | d0ed3f5488ad403ca8cb6b42787b57a35b760327 (patch) | |
| tree | 5463aea321523d9c500220e137101889eaacb580 /arch/arm/boot/dts/imx6qdl-udoo.dtsi | |
| parent | ARM: dts: imx53-cx9020: Fix the Ethernet PHY reset GPIO polarity (diff) | |
| download | linux-d0ed3f5488ad403ca8cb6b42787b57a35b760327.tar.xz linux-d0ed3f5488ad403ca8cb6b42787b57a35b760327.zip | |
ARM: dts: imx6qdl-udoo: add support for powering off
UDOO board has a possibility to disable most of imx6 SoC power supplies via
"EN_5V" signal, which is connected to "NANDF_D4" pad.
This reduces current consumption after shutdown from ~350 mA to ~40 mA and
prevents a SoC watchdog from starting it again on its own after the
watchdog timeout expires (previously it was not possible to shut down the
SoC permanently if its watchdog was ever enabled since it was still ticking
after the shutdown).
Unfortunately, this does not extinguish the "Power" LED (as it is powered
from an always-on voltage regulator).
To power the SoC up again press the power button (SW2, the one with a long
shaft).
Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-udoo.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-udoo.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi index 839282c55701..4161b7d4323a 100644 --- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi +++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi @@ -28,6 +28,13 @@ status = "disabled"; }; + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio2 4 0>; + pinctrl-0 = <&pinctrl_power_off>; + pinctrl-names = "default"; + }; + memory { reg = <0x10000000 0x40000000>; }; @@ -172,6 +179,12 @@ >; }; + pinctrl_power_off: poweroffgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30 + >; + }; + pinctrl_touchscreenp7: touchscreenp7grp { fsl,pins = < MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70 |