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authorPhilipp Zabel <p.zabel@pengutronix.de>2017-06-12 20:23:54 +0200
committerShawn Guo <shawnguo@kernel.org>2017-06-14 17:06:02 +0200
commitbc97e88ecd360a730b0f9c96f285b680be496e06 (patch)
tree78c0add3d9a362af8107a277c54dc589cc761b59 /arch/arm/boot/dts/imx6qdl.dtsi
parentARM: dts: imx6: Fix PCI GPIO reset polarity (diff)
downloadlinux-bc97e88ecd360a730b0f9c96f285b680be496e06.tar.xz
linux-bc97e88ecd360a730b0f9c96f285b680be496e06.zip
ARM: dts: imx6qdl: add multiplexer controls
The IOMUXC General Purpose Register space contains various bitfields that control video bus multiplexers. Describe them using a mmio-mux node. The placement of the IPU CSI video mux controls differs between i.MX6D/Q and i.MX6S/DL. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index f325411f66aa..4ea7d86e625e 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -826,8 +826,13 @@
};
gpr: iomuxc-gpr@020e0000 {
- compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
reg = <0x020e0000 0x38>;
+
+ mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ };
};
iomuxc: iomuxc@020e0000 {