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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-07-12 14:49:31 +0200 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-08-22 17:29:18 +0200 |
| commit | 5ff88341cf2cd1096651765409ebca4e6f7c55d1 (patch) | |
| tree | 50d87d4735b3c120f72dd7a04afa567f28e817e4 /arch/arm/boot/dts/imx6qdl.dtsi | |
| parent | ARM: dts: imx6qdl.dtsi: Add usdhc1 pin groups (diff) | |
| download | linux-5ff88341cf2cd1096651765409ebca4e6f7c55d1.tar.xz linux-5ff88341cf2cd1096651765409ebca4e6f7c55d1.zip | |
ARM: dts: imx6qdl.dtsi: Add another uart3 pin group
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 76d3745245fa..9c64d17d5853 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -1039,6 +1039,15 @@ MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 >; }; + + pinctrl_uart3_2: uart3grp-2 { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + >; + }; }; uart4 { |