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authorLucas Stach <l.stach@pengutronix.de>2017-01-20 17:17:40 +0100
committerShawn Guo <shawnguo@kernel.org>2017-01-29 02:55:58 +0100
commit7c3f836369f9362933f856f6e57b30b59381d887 (patch)
tree2b30ae6889675774f45761f1dd001086a158cf8c /arch/arm/boot/dts/imx6qp.dtsi
parentARM: imx6: fix regulator constraints on anatop 1p1 and 2p5 (diff)
downloadlinux-7c3f836369f9362933f856f6e57b30b59381d887.tar.xz
linux-7c3f836369f9362933f856f6e57b30b59381d887.zip
ARM: imx6qp: adapt DT to changed FEC interrupts
On i.MX6QP the FEC interrupts are wired to the GPC, just like all other device interrupts. This allows to FEC to wake the CPU from WFI, but for this to work the kernel needs to know about the new IRQ routing. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qp.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qp.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 0d4977ab7d29..24d071f5d9cd 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -95,6 +95,12 @@
};
};
+&fec {
+ /delete-property/interrupts-extended;
+ interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
+ <0 119 IRQ_TYPE_LEVEL_HIGH>;
+};
+
&ldb {
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,