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authorLinus Torvalds <torvalds@linux-foundation.org>2017-05-09 18:54:39 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2017-05-09 18:54:39 +0200
commit85d604902eb28eaea4f9e0f3a655ae986fa4bd2e (patch)
tree3ca4ff0c7e13c09ad006f378fac066790586f391 /arch/arm/boot/dts/imx6qp.dtsi
parentMerge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/a... (diff)
parentMerge tag 'samsung-dt-4.12-2' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff)
downloadlinux-85d604902eb28eaea4f9e0f3a655ae986fa4bd2e.tar.xz
linux-85d604902eb28eaea4f9e0f3a655ae986fa4bd2e.zip
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson: "Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. Major new platforms: - Gemini has been ported to DT, so a handful of "new" platforms moved over from board files - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK - A bunch of embedded platforms, several Linksys platforms, Synology DS116, - Motorola Droid4 (really old OMAP-based phone) support is added. Some refactorings, i.e. Allwinner H3/H5 support is commonalized. And lots of smaller changes, cleanups, etc. See shortlog for more description We're adding ability to cross-include DT files between arm and arm64, by creating appropriate links in the dt-include directory, and using arm/ and arm64/ as include prefixes. This will avoid other local hacks such as per-file links between the two arch trees (this broke for external mirroring of DT contents). Now they can just provide their own appropriate dt-include hierarcy per platform" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits) ARM: dts: exynos: Use - instead of @ for DT OPP entries arm: spear6xx: add DT description of the ADC on SPEAr600 arm: spear6xx: remove unneeded pinctrl properties in spear600-evb arm: spear6xx: switch spear600-evb to the new flash partition DT binding arm: spear6xx: fix spaces in spear600-evb.dts arm: spear6xx: use node labels in spear600-evb.dts arm: spear6xx: add labels to various nodes in spear600.dtsi ARM: dts: vexpress: fix few unit address format warnings ARM: dts: at91: sama5d3_xplained: not all ADC channels are available ARM: dts: at91: sama5d3_xplained: fix ADC vref ARM: dts: at91: add envelope detector mux to the Axentia TSE-850 ARM: dts: armada-38x: label USB and SATA nodes ARM: dts: imx6q-utilite-pro: add hpd gpio ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply ARM: dts: imx6qdl-sabresd: Set LDO regulator supply ARM: dts: imx: add Gateworks Ventana GW5903 support ARM: dts: i.MX25: add AIPS control registers ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators ARM: dts: imx7-colibri: remove 1.8V fixed regulator ARM: dts: imx7-colibri: allow to disable Ethernet rail ...
Diffstat (limited to 'arch/arm/boot/dts/imx6qp.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qp.dtsi99
1 files changed, 68 insertions, 31 deletions
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 24d071f5d9cd..59453f2ac4ba 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -56,40 +56,59 @@
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
- ipu1: ipu@02400000 {
- compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
- clocks = <&clks IMX6QDL_CLK_IPU1>,
- <&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
- <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
- <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
- <&clks IMX6QDL_CLK_PRG0_APB>;
- clock-names = "bus",
- "di0", "di1",
- "di0_sel", "di1_sel",
- "ldb_di0", "ldb_di1", "prg";
- };
+ aips-bus@02100000 {
+ pre1: pre@21c8000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021c8000 0x1000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clks IMX6QDL_CLK_PRE0>;
+ clock-names = "axi";
+ fsl,iram = <&ocram2>;
+ };
- ipu2: ipu@02800000 {
- compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
- clocks = <&clks IMX6QDL_CLK_IPU2>,
- <&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
- <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
- <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
- <&clks IMX6QDL_CLK_PRG1_APB>;
- clock-names = "bus",
- "di0", "di1",
- "di0_sel", "di1_sel",
- "ldb_di0", "ldb_di1", "prg";
- };
+ pre2: pre@21c9000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021c9000 0x1000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clks IMX6QDL_CLK_PRE1>;
+ clock-names = "axi";
+ fsl,iram = <&ocram2>;
+ };
- pcie: pcie@0x01000000 {
- compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
- };
+ pre3: pre@21ca000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021ca000 0x1000>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clks IMX6QDL_CLK_PRE2>;
+ clock-names = "axi";
+ fsl,iram = <&ocram3>;
+ };
- aips-bus@02100000 {
- mmdc0: mmdc@021b0000 { /* MMDC0 */
- compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
- reg = <0x021b0000 0x4000>;
+ pre4: pre@21cb000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021cb000 0x1000>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clks IMX6QDL_CLK_PRE3>;
+ clock-names = "axi";
+ fsl,iram = <&ocram3>;
+ };
+
+ prg1: prg@21cc000 {
+ compatible = "fsl,imx6qp-prg";
+ reg = <0x021cc000 0x1000>;
+ clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
+ <&clks IMX6QDL_CLK_PRG0_AXI>;
+ clock-names = "ipg", "axi";
+ fsl,pres = <&pre1>, <&pre2>, <&pre3>;
+ };
+
+ prg2: prg@21cd000 {
+ compatible = "fsl,imx6qp-prg";
+ reg = <0x021cd000 0x1000>;
+ clocks = <&clks IMX6QDL_CLK_PRG1_APB>,
+ <&clks IMX6QDL_CLK_PRG1_AXI>;
+ clock-names = "ipg", "axi";
+ fsl,pres = <&pre4>, <&pre2>, <&pre3>;
};
};
};
@@ -101,6 +120,16 @@
<0 119 IRQ_TYPE_LEVEL_HIGH>;
};
+&ipu1 {
+ compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
+ fsl,prg = <&prg1>;
+};
+
+&ipu2 {
+ compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
+ fsl,prg = <&prg2>;
+};
+
&ldb {
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
@@ -110,3 +139,11 @@
"di0_sel", "di1_sel", "di2_sel", "di3_sel",
"di0", "di1";
};
+
+&mmdc0 {
+ compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
+};
+
+&pcie {
+ compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
+};