diff options
| author | Vanessa Maegima <vanessa.maegima@nxp.com> | 2016-07-18 18:25:10 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-08-09 08:48:32 +0200 |
| commit | 9eebb750bb3ab56cb00911cd01fb00aad52f0d82 (patch) | |
| tree | 06d485781f76717e3f1edfe5466a6044b50cc414 /arch/arm/boot/dts/imx6ul-pico-hobbit.dts | |
| parent | ARM: i.MX6 Phytec PFLA02: Add supplies for the SoC internal regulators (diff) | |
| download | linux-9eebb750bb3ab56cb00911cd01fb00aad52f0d82.tar.xz linux-9eebb750bb3ab56cb00911cd01fb00aad52f0d82.zip | |
ARM: dts: imx6ul-pico-hobbit: Add Wifi support
imx6ul-pico-hobbit has a bcm4343 wifi chip connected to usdhc2 port.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul-pico-hobbit.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul-pico-hobbit.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts index 86f68faded0e..7b18dc4727a9 100644 --- a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts +++ b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts @@ -100,6 +100,18 @@ gpio = <&gpio1 6 0>; }; + reg_brcm: regulator-brcm { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_brcm_reg>; + regulator-name = "brcm_reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <200000>; + }; + sound { compatible = "fsl,imx-audio-sgtl5000"; model = "imx6ul-sgtl5000"; @@ -325,12 +337,21 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; no-1-8-v; + non-removable; keep-power-in-suspend; wakeup-source; + vmmc-supply = <®_brcm>; status = "okay"; }; &iomuxc { + pinctrl_brcm_reg: brcmreggrp { + fsl,pins = < + MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x10b0 /* WL_REG_ON */ + MX6UL_PAD_NAND_DATA04__GPIO4_IO06 0x10b0 /* WL_HOST_WAKE */ + >; + }; + pinctrl_enet2: enet2grp { fsl,pins = < MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x1b0b0 |