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authorPhilippe Schenker <philippe.schenker@toradex.com>2019-08-27 15:18:22 +0200
committerShawn Guo <shawnguo@kernel.org>2019-10-02 03:09:49 +0200
commite512cef81a93de88967d8862f0d6286047f6a226 (patch)
treed6cf4308b1e3b10c81b2728169ce5076c43db4e9 /arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
parentARM: dts: imx7-colibri: fix 1.8V/UHS support (diff)
downloadlinux-e512cef81a93de88967d8862f0d6286047f6a226.tar.xz
linux-e512cef81a93de88967d8862f0d6286047f6a226.zip
ARM: dts: imx7-colibri: Add touch controllers
Add touch controller that is connected over an I2C bus. It is disabled by default because the pins are also used for PWM, which is the standard use for colibri boards. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi')
-rw-r--r--arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 45c4e721115a..6aa123cbdadb 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -145,6 +145,21 @@
&i2c4 {
status = "okay";
+ /*
+ * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
+ * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
+ */
+ touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ status = "disabled";
+ };
+
/* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 {
compatible = "st,m41t0";
@@ -200,3 +215,12 @@
vmmc-supply = <&reg_3v3>;
status = "okay";
};
+
+&iomuxc {
+ pinctrl_gpiotouch: touchgpios {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74
+ MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14
+ >;
+ };
+};