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authorMichael Walle <michael@walle.cc>2021-05-14 20:55:53 +0200
committerShawn Guo <shawnguo@kernel.org>2021-05-23 07:07:57 +0200
commit52387bb9a4a75b88887383cb91d3995ae6f4044a (patch)
treec35e04bc4ccad52da789f3502a5c52743d8e3dad /arch/arm/boot/dts/imx7d-meerkat96.dts
parentarm64: dts: freescale: sl28: var4: fix RGMII clock and voltage (diff)
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arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage
During hardware validation it was noticed that the clock isn't continuously enabled when there is no link. This is because the 125MHz clock is derived from the internal PLL which seems to go into some kind of power-down mode every once in a while. The LS1028A expects a contiuous clock. Thus enable the PLL all the time. Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO regulator. This fix is for the freescale/fsl-ls1028a-kontron-sl28-var1.dts. Fixes: 642856097c18 ("arm64: dts: freescale: sl28: add variant 1") Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7d-meerkat96.dts')
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