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| author | Vanessa Maegima <vanessa.maegima@nxp.com> | 2016-08-30 22:23:04 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-09-05 04:21:18 +0200 |
| commit | 9fa7a2a4f9d90901e845fb4cafe815d08c2981c5 (patch) | |
| tree | 5f53a5d9719c54151e8e4d3e15eb58a6b1c7033e /arch/arm/boot/dts/imx7s-warp.dts | |
| parent | ARM: dts: imx7s-warp: Add User Button support (diff) | |
| download | linux-9fa7a2a4f9d90901e845fb4cafe815d08c2981c5.tar.xz linux-9fa7a2a4f9d90901e845fb4cafe815d08c2981c5.zip | |
ARM: dts: imx7s-warp: Add Bluetooth support
WaRP7 has a BCM43430 Bluetooth chip.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7s-warp.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx7s-warp.dts | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7s-warp.dts b/arch/arm/boot/dts/imx7s-warp.dts index df74f0c9f102..0345267f3390 100644 --- a/arch/arm/boot/dts/imx7s-warp.dts +++ b/arch/arm/boot/dts/imx7s-warp.dts @@ -79,6 +79,18 @@ startup-delay-us = <200000>; }; + reg_bt: regulator-bt { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_bt_reg>; + enable-active-high; + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; + regulator-name = "bt_reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "imx7-sgtl5000"; @@ -250,6 +262,15 @@ status = "okay"; }; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + status = "okay"; +}; + &usbotg1 { dr_mode = "peripheral"; status = "okay"; @@ -293,6 +314,12 @@ >; }; + pinctrl_bt_reg: btreggrp { + fsl,pins = < + MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* BT_REG_ON */ + >; + }; + pinctrl_gpio: gpiogrp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x14 @@ -342,6 +369,15 @@ >; }; + pinctrl_uart3: uart3grp { + fsl,pins = < + MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79 + MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79 + MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79 + MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x59 |