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| author | Rui Miguel Silva <rui.silva@linaro.org> | 2018-02-22 15:22:50 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-02-28 07:58:44 +0100 |
| commit | 0eeabcad7da55e02597b400efb4e8f3af746e936 (patch) | |
| tree | 90ba799fe8a25154e0ff160631cb62377ef9cc3d /arch/arm/boot/dts/imx7s.dtsi | |
| parent | ARM: dts: imx7s: add snvs rtc clock (diff) | |
| download | linux-0eeabcad7da55e02597b400efb4e8f3af746e936.tar.xz linux-0eeabcad7da55e02597b400efb4e8f3af746e936.zip | |
ARM: dts: imx7s: add CAAM device node
Add CAAM device node to the i.MX7s device tree.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: "Horia Geantă" <horia.geanta@nxp.com>
Cc: Aymen Sghaier <aymen.sghaier@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7s.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 02baf425b1ac..c579e85b4325 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -824,6 +824,36 @@ status = "disabled"; }; + crypto: caam@30900000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x30900000 0x40000>; + ranges = <0 0x30900000 0x40000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX7D_CAAM_CLK>, + <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>; + clock-names = "ipg", "aclk"; + + sec_jr0: jr0@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr2: jr1@3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + flexcan1: can@30a00000 { compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; reg = <0x30a00000 0x10000>; |