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| author | Rui Miguel Silva <rui.silva@linaro.org> | 2019-03-28 15:25:13 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2019-04-11 04:23:15 +0200 |
| commit | 94a905a79f2cf337376c195acda406a2385792f4 (patch) | |
| tree | cca4b97a907b1ae500b035fb40166d4e05b0d820 /arch/arm/boot/dts/imx7s.dtsi | |
| parent | ARM: dts: imx7s: add mipi phy power domain (diff) | |
| download | linux-94a905a79f2cf337376c195acda406a2385792f4.tar.xz linux-94a905a79f2cf337376c195acda406a2385792f4.zip | |
ARM: dts: imx7s: add multiplexer controls
The IOMUXC General Purpose Register has bitfield to control video bus
multiplexer to control the CSI input between the MIPI-CSI2 and parallel
interface. Add that register and mask.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7s.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 9a680d3d6424..792efcd2caa1 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -497,8 +497,15 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", + "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <0>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 { |