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author | Peng Fan <peng.fan@nxp.com> | 2019-12-18 13:22:32 +0100 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2019-12-23 08:42:00 +0100 |
commit | b8ab62ff7199fac8ce27fa4a149929034fabe7f8 (patch) | |
tree | 292747bb33348974f51c049499dfa513044fa9fc /arch/arm/boot/dts/imx7ulp.dtsi | |
parent | arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm (diff) | |
download | linux-b8ab62ff7199fac8ce27fa4a149929034fabe7f8.tar.xz linux-b8ab62ff7199fac8ce27fa4a149929034fabe7f8.zip |
ARM: dts: imx7ulp: fix reg of cpu node
According to arm cpus binding doc,
"
On 32-bit ARM v7 or later systems this property is
required and matches the CPU MPIDR[23:0] register
bits.
Bits [23:0] in the reg cell must be set to
bits [23:0] in MPIDR.
All other bits in the reg cell must be set to 0.
"
In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it.
Otherwise there will be warning:
"DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map"
Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx7ulp.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index d37a1927c88e..ab91c98f2124 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -37,10 +37,10 @@ #address-cells = <1>; #size-cells = <0>; - cpu0: cpu@0 { + cpu0: cpu@f00 { compatible = "arm,cortex-a7"; device_type = "cpu"; - reg = <0>; + reg = <0xf00>; }; }; |