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authorRob Herring <robh@kernel.org>2021-09-28 21:21:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2021-10-20 02:31:22 +0200
commit3e70cee46cbcdf3dc5b89c525a4632f051f8abd9 (patch)
tree533d6255660f94a0726adca84f4c364de806ebb4 /arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts
parentARM: dts: Add PTP timesource to the IXP456x (diff)
downloadlinux-3e70cee46cbcdf3dc5b89c525a4632f051f8abd9.tar.xz
linux-3e70cee46cbcdf3dc5b89c525a4632f051f8abd9.zip
ARM: dts: ixp4xx: Group PCI interrupt properties together
Move the PCI 'interrupt-map-mask' and '#interrupt-cells' properties alongside the 'interrupt-map' property in each board dts. This avoids having incomplete set of interrupt properties which may fail validation. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts')
-rw-r--r--arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts b/arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts
index 6b28dda747fd..5e7e31b74b04 100644
--- a/arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts
+++ b/arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts
@@ -123,6 +123,8 @@
* We have up to 2 slots (IDSEL) with 2 swizzled IRQs.
* Derived from the GTWX5715 PCI boardfile.
*/
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map =
/* IDSEL 0 */
<0x0000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 0 is irq 10 */