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| author | Rob Herring <robh@kernel.org> | 2021-09-28 21:21:22 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-10-20 02:31:22 +0200 |
| commit | 3e70cee46cbcdf3dc5b89c525a4632f051f8abd9 (patch) | |
| tree | 533d6255660f94a0726adca84f4c364de806ebb4 /arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi | |
| parent | ARM: dts: Add PTP timesource to the IXP456x (diff) | |
| download | linux-3e70cee46cbcdf3dc5b89c525a4632f051f8abd9.tar.xz linux-3e70cee46cbcdf3dc5b89c525a4632f051f8abd9.zip | |
ARM: dts: ixp4xx: Group PCI interrupt properties together
Move the PCI 'interrupt-map-mask' and '#interrupt-cells' properties
alongside the 'interrupt-map' property in each board dts. This avoids
having incomplete set of interrupt properties which may fail validation.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi b/arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi index c1d9c49982b3..146352ba848b 100644 --- a/arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi +++ b/arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi @@ -106,6 +106,8 @@ * PCI slots on the BIXMB425BD base card. * We have up to 4 slots (IDSEL) with 4 swizzled IRQs. */ + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = /* IDSEL 1 */ <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */ |