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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2015-08-18 10:09:00 +0200 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2015-10-09 17:08:01 +0200 |
| commit | eb69e001983d16f5897ad0b0c8e15d06eecab01d (patch) | |
| tree | c62bd97148b84b49adcf28e8d8354dc6085f82df /arch/arm/boot/dts/kirkwood.dtsi | |
| parent | ARM: mvebu: define crypto SRAM ranges for all armada-38x boards (diff) | |
| download | linux-eb69e001983d16f5897ad0b0c8e15d06eecab01d.tar.xz linux-eb69e001983d16f5897ad0b0c8e15d06eecab01d.zip | |
ARM: mvebu: use new bindings for existing crypto devices
The new bindings split the crypto and sram node in two separate devices.
Modify the existing crypto nodes to match the new representation.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/kirkwood.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/kirkwood.dtsi | 29 |
1 files changed, 19 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 464f09a1a4a5..c5f913b5fe42 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -40,16 +40,6 @@ pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ - cesa: crypto@0301 { - compatible = "marvell,orion-crypto"; - reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>, - <MBUS_ID(0x03, 0x01) 0 0x800>; - reg-names = "regs", "sram"; - interrupts = <22>; - clocks = <&gate_clk 17>; - status = "okay"; - }; - nand: nand@012f { #address-cells = <1>; #size-cells = <1>; @@ -65,6 +55,14 @@ pinctrl-names = "default"; status = "disabled"; }; + + crypto_sram: sa-sram@0301 { + compatible = "mmio-sram"; + reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>; + clocks = <&gate_clk 17>; + #address-cells = <1>; + #size-cells = <1>; + }; }; ocp@f1000000 { @@ -252,6 +250,17 @@ status = "okay"; }; + cesa: crypto@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>; + reg-names = "regs"; + interrupts = <22>; + clocks = <&gate_clk 17>; + marvell,crypto-srams = <&crypto_sram>; + marvell,crypto-sram-size = <0x800>; + status = "okay"; + }; + usb0: ehci@50000 { compatible = "marvell,orion-ehci"; reg = <0x50000 0x1000>; |