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| author | Jason Gunthorpe <jgunthorpe@obsidianresearch.com> | 2013-09-17 20:41:46 +0200 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-10-01 18:28:03 +0200 |
| commit | 7f69f8a4997ad12e062ddac8d6f996a50b26ebc2 (patch) | |
| tree | 34ab73a188741fa994fe2cd6664bdeffb1d785b1 /arch/arm/boot/dts/kirkwood.dtsi | |
| parent | ARM: dove: add initial DT file for Globalscale D3Plug (diff) | |
| download | linux-7f69f8a4997ad12e062ddac8d6f996a50b26ebc2.tar.xz linux-7f69f8a4997ad12e062ddac8d6f996a50b26ebc2.zip | |
ARM: kirkwood: Remove kirkwood_setup_wins and rely on the DT binding
kirkwood_setup_wins is the last manual caller of mbus in kirkwood, don't
call it for DT boards and rely on the DT having a mbus node with
a proper ranges property to setup these windows.
Move all the mbus ranges properties for all boards into kirkwood.dtsi,
since they are currently all the same.
This makes the DT self consistent, since the physical address of the
NAND and CRYPTO are both referenced internally. The arbitary Linux
constants KIRKWOOD_NAND_MEM_PHYS_BASE and KIRKWOOD_SRAM_PHYS_BASE
no longer have to match the DT values.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/kirkwood.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/kirkwood.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index cf7aeaf89e9c..d1bbe955b439 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -27,6 +27,11 @@ compatible = "marvell,kirkwood-mbus", "simple-bus"; #address-cells = <2>; #size-cells = <1>; + /* If a board file needs to change this ranges it must replace it completely */ + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */ + MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */ + MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */ + >; controller = <&mbusc>; pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ |