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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-07-27 14:12:57 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-08-05 23:38:07 +0200 |
| commit | dee51cd0d2e8af08c74e5bbb10673af1cf0ee4a3 (patch) | |
| tree | 505608b5e157bd23152d6e257b08571d967ce14b /arch/arm/boot/dts/meson8b-mxq.dts | |
| parent | ARM: dts: meson8b: odroidc1: add the VDDEE regulator (diff) | |
| download | linux-dee51cd0d2e8af08c74e5bbb10673af1cf0ee4a3.tar.xz linux-dee51cd0d2e8af08c74e5bbb10673af1cf0ee4a3.zip | |
ARM: dts: meson8b: mxq: add the VDDEE regulator
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.
Add the VDDEE PWM regulator and make it the supply of the Mali GPU.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8b-mxq.dts')
| -rw-r--r-- | arch/arm/boot/dts/meson8b-mxq.dts | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index bb27b34eb346..6e39ad52e42d 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -76,6 +76,22 @@ regulator-boot-on; regulator-always-on; }; + + vddee: regulator-vddee { + compatible = "pwm-regulator"; + + regulator-name = "VDDEE"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1140000>; + + vin-supply = <&vcc_5v>; + + pwms = <&pwm_cd 1 1148 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; }; &cpu0 { @@ -112,6 +128,10 @@ }; }; +&mali { + mali-supply = <&vddee>; +}; + &saradc { status = "okay"; vref-supply = <&vcc_1v8>; @@ -143,10 +163,10 @@ &pwm_cd { status = "okay"; - pinctrl-0 = <&pwm_c1_pins>; + pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>; - clock-names = "clkin0"; + clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clock-names = "clkin0", "clkin1"; }; &uart_AO { |