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| author | Xingyu Chen <xingyu.chen@amlogic.com> | 2017-11-16 10:01:15 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2017-12-07 02:03:47 +0100 |
| commit | b9b9db02018d5eddb06cf5e0fed9f70bd07b5900 (patch) | |
| tree | e4032e9fc6442a7ac6eaeb9c46e104a445c48941 /arch/arm/boot/dts/meson8b.dtsi | |
| parent | ARM: dts: meson8: add more L2 cache settings (diff) | |
| download | linux-b9b9db02018d5eddb06cf5e0fed9f70bd07b5900.tar.xz linux-b9b9db02018d5eddb06cf5e0fed9f70bd07b5900.zip | |
ARM: dts: meson: drop "sana" clock from SAR ADC
The SAR ADC modules doesn't require The "sana" clock.
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/meson8b.dtsi | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 65e7d026f797..b6de3edfcb21 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -239,9 +239,8 @@ &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>; - clock-names = "clkin", "core", "sana"; + <&clkc CLKID_SAR_ADC>; + clock-names = "clkin", "core"; }; &sdio { |