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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2021-07-18 01:30:29 +0200
committerNeil Armstrong <narmstrong@baylibre.com>2021-07-26 10:01:03 +0200
commit4f8ca13df1d5ff1c09e06acbd1bc7d4d8510dfc0 (patch)
tree88b10d4ac1ac4f05c76ad271ad93b0941d7f159c /arch/arm/boot/dts/meson8b.dtsi
parentARM: dts: meson8: Use a higher default GPU clock frequency (diff)
downloadlinux-4f8ca13df1d5ff1c09e06acbd1bc7d4d8510dfc0.tar.xz
linux-4f8ca13df1d5ff1c09e06acbd1bc7d4d8510dfc0.zip
ARM: dts: meson: Add the AIU audio controller
Add the AIU audio controller to the Amlogic Meson6/8/8b/8m2 SoC DT. This provides I2S and SPDIF outputs as well as codec glues for the internal HDMI controller. Also add the clock inputs and pin mux definitions on Meson8/8b/8m2. On Meson6 this is omitted because we neither have a clock nor pin controller node there yet. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210717233030.331273-2-martin.blumenstingl@googlemail.com
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index c02b03cbcdf4..b49b7cbaed4e 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -279,6 +279,29 @@
};
}; /* end of / */
+&aiu {
+ compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
+ clocks = <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_CTS_AMCLK>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>,
+ <&clkc CLKID_CTS_MCLK_I958>,
+ <&clkc CLKID_CTS_I958>;
+ clock-names = "pclk",
+ "i2s_pclk",
+ "i2s_aoclk",
+ "i2s_mclk",
+ "i2s_mixer",
+ "spdif_pclk",
+ "spdif_aoclk",
+ "spdif_mclk",
+ "spdif_mclk_sel";
+ resets = <&reset RESET_AIU>;
+};
+
&aobus {
pmu: pmu@e0 {
compatible = "amlogic,meson8b-pmu", "syscon";
@@ -302,6 +325,46 @@
gpio-ranges = <&pinctrl_aobus 0 0 16>;
};
+ i2s_am_clk_pins: i2s-am-clk-out {
+ mux {
+ groups = "i2s_am_clk_out";
+ function = "i2s";
+ bias-disable;
+ };
+ };
+
+ i2s_out_ao_clk_pins: i2s-ao-clk-out {
+ mux {
+ groups = "i2s_ao_clk_out";
+ function = "i2s";
+ bias-disable;
+ };
+ };
+
+ i2s_out_lr_clk_pins: i2s-lr-clk-out {
+ mux {
+ groups = "i2s_lr_clk_out";
+ function = "i2s";
+ bias-disable;
+ };
+ };
+
+ i2s_out_ch01_ao_pins: i2s-out-ch01 {
+ mux {
+ groups = "i2s_out_01";
+ function = "i2s";
+ bias-disable;
+ };
+ };
+
+ spdif_out_1_pins: spdif-out-1 {
+ mux {
+ groups = "spdif_out_1";
+ function = "spdif_1";
+ bias-disable;
+ };
+ };
+
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";