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| author | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-05 04:28:30 +0200 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-16 10:17:10 +0200 |
| commit | 51931b37fcb17a2f48f726fd21b88e3af770ddc2 (patch) | |
| tree | 4c90add345de8cadd83802b592a62a8d0aebc2d6 /arch/arm/boot/dts/mmp2.dtsi | |
| parent | ARM: mmp: enable tauros2 cache in pxa910 (diff) | |
| download | linux-51931b37fcb17a2f48f726fd21b88e3af770ddc2.tar.xz linux-51931b37fcb17a2f48f726fd21b88e3af770ddc2.zip | |
ARM: mmp: enable tauros2 cache in mmp2 dt
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/mmp2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/mmp2.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index 80f74e256408..0514fb41627e 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -26,6 +26,11 @@ interrupt-parent = <&intc>; ranges; + L2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0x3>; + }; + axi@d4200000 { /* AXI */ compatible = "mrvl,axi-bus", "simple-bus"; #address-cells = <1>; |