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authorTony Lindgren <tony@atomide.com>2020-06-02 02:18:56 +0200
committerTony Lindgren <tony@atomide.com>2020-06-02 18:26:25 +0200
commit0df12a01f4857495816b05f048c4c31439446e35 (patch)
tree3bc538b7d4e8e3cc77c33be56b9a21a8a43fab3c /arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
parentbus: ti-sysc: Flush posted write on enable and disable (diff)
downloadlinux-0df12a01f4857495816b05f048c4c31439446e35.tar.xz
linux-0df12a01f4857495816b05f048c4c31439446e35.zip
ARM: dts: omap4-droid4: Fix spi configuration and increase rate
We can currently sometimes get "RXS timed out" errors and "EOT timed out" errors with spi transfers. These errors can be made easy to reproduce by reading the cpcap iio values in a loop while keeping the CPUs busy by also reading /dev/urandom. The "RXS timed out" errors we can fix by adding spi-cpol and spi-cpha in addition to the spi-cs-high property we already have. The "EOT timed out" errors we can fix by increasing the spi clock rate to 9.6 MHz. Looks similar MC13783 PMIC says it works at spi clock rates up to 20 MHz, so let's assume we can pick any rate up to 20 MHz also for cpcap. Cc: maemo-leste@lists.dyne.org Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi')
-rw-r--r--arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
index e39eee628afd..08a7d3ce383f 100644
--- a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
+++ b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
@@ -13,8 +13,10 @@
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
- spi-max-frequency = <3000000>;
+ spi-max-frequency = <9600000>;
spi-cs-high;
+ spi-cpol;
+ spi-cpha;
cpcap_adc: adc {
compatible = "motorola,mapphone-cpcap-adc";