diff options
author | Tony Lindgren <tony@atomide.com> | 2011-12-16 23:13:09 +0100 |
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committer | Tony Lindgren <tony@atomide.com> | 2011-12-16 23:15:16 +0100 |
commit | f20b933d2a51ffce8af1c8b77b925ce07245a575 (patch) | |
tree | 38a287a43107f39ce75b061d91befa044ad72593 /arch/arm/boot/dts/omap2.dtsi | |
parent | omap-serial: Add minimal device tree support (diff) | |
download | linux-f20b933d2a51ffce8af1c8b77b925ce07245a575.tar.xz linux-f20b933d2a51ffce8af1c8b77b925ce07245a575.zip |
arm/dts: Add minimal device tree support for omap2420 and omap2430
Add minimal device tree support for omap2420 and omap2430.
This is needed to keep the uart functional on omap2 after
omap_serial_init is removed from board-generic.c.
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/omap2.dtsi | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi new file mode 100644 index 000000000000..f2ab4ea7cc0e --- /dev/null +++ b/arch/arm/boot/dts/omap2.dtsi @@ -0,0 +1,67 @@ +/* + * Device Tree Source for OMAP2 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; + + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + }; + + cpus { + cpu@0 { + compatible = "arm,arm1136jf-s"; + }; + }; + + soc { + compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap2-mpu"; + ti,hwmods = "mpu"; + }; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main"; + + intc: interrupt-controller@1 { + compatible = "ti,omap2-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart1: serial@4806a000 { + compatible = "ti,omap2-uart"; + ti,hwmods = "uart1"; + clock-frequency = <48000000>; + }; + + uart2: serial@4806c000 { + compatible = "ti,omap2-uart"; + ti,hwmods = "uart2"; + clock-frequency = <48000000>; + }; + + uart3: serial@4806e000 { + compatible = "ti,omap2-uart"; + ti,hwmods = "uart3"; + clock-frequency = <48000000>; + }; + }; +}; |