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authorRoger Quadros <rogerq@ti.com>2016-02-23 17:37:25 +0100
committerTony Lindgren <tony@atomide.com>2016-02-26 19:32:14 +0100
commit44e4716499b8988a20ba99ba5c871cdbf1c819fd (patch)
treed1c4994201c69bbfa7d8d4443e2533d9dfd059c3 /arch/arm/boot/dts/omap3-gta04.dtsi
parentARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND (diff)
downloadlinux-44e4716499b8988a20ba99ba5c871cdbf1c819fd.tar.xz
linux-44e4716499b8988a20ba99ba5c871cdbf1c819fd.zip
ARM: dts: omap3: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-gta04.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index 5e2d6433d939..ab9fb8f49ff3 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -492,7 +492,11 @@
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";