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author | Javier Martinez Canillas <javier.martinez@collabora.co.uk> | 2013-10-07 17:12:24 +0200 |
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committer | Benoit Cousson <bcousson@baylibre.com> | 2013-10-11 21:06:43 +0200 |
commit | 339e834fe06a2367ab8dcc18e57e810997ac9750 (patch) | |
tree | 396cea58086fccf5b607815ab5e4762cfc66c1bf /arch/arm/boot/dts/omap3-igep0020.dts | |
parent | ARM: dts: omap3-igep: Add USB OTG support (diff) | |
download | linux-339e834fe06a2367ab8dcc18e57e810997ac9750.tar.xz linux-339e834fe06a2367ab8dcc18e57e810997ac9750.zip |
ARM: dts: omap3-igep0020: Add HS USB Host support
Add device nodes for the HS USB Host port 1, USB PHY and its
required regulator and also pin mux setup for HS USB1 pins.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-igep0020.dts')
-rw-r--r-- | arch/arm/boot/dts/omap3-igep0020.dts | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index eedf0d8b42d5..35346f2473b6 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -55,6 +55,47 @@ regulator-name = "vdd33a"; regulator-always-on; }; + + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ + startup-delay-us = <70000>; + }; + + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ + vcc-supply = <&hsusb1_power>; + }; +}; + +&omap3_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &hsusbb1_pins + >; + + hsusbb1_pins: pinmux_hsusbb1_pins { + pinctrl-single,pins = < + 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ + 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ + 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ + 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ + 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ + 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ + 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ + 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ + 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ + 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ + 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ + 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ + >; + }; }; &leds_pins { @@ -166,3 +207,11 @@ smsc,save-mac-address; }; }; + +&usbhshost { + port1-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; |