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authorTony Lindgren <tony@atomide.com>2022-04-29 08:57:36 +0200
committerTony Lindgren <tony@atomide.com>2022-05-03 08:15:44 +0200
commit32169e7ef4be5cb3af7c2c32fde9e07171b4c80b (patch)
tree7d1455db0336ccaa85a52f11a797c11e442446fa /arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
parentARM: dts: Group omap3 CM_CLKSEL_DSS clocks (diff)
downloadlinux-32169e7ef4be5cb3af7c2c32fde9e07171b4c80b.tar.xz
linux-32169e7ef4be5cb3af7c2c32fde9e07171b4c80b.zip
ARM: dts: Group omap3 CM_FCLKEN_CAM clocks
The clksel related registers on omap3 cause unique_unit_address and node_name_chars_strict warnings with the W=1 or W=2 make flags enabled. With the clock drivers updated, we can now avoid most of these warnings by grouping the TI component clocks using the TI clksel binding, and with the use of clock-output-names property to avoid non-standard node names for the clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi38
1 files changed, 23 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
index edc28654d158..8374532f20e2 100644
--- a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
@@ -60,13 +60,29 @@
};
};
- cam_mclk: cam_mclk@f00 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&dpll4_m5x2_ck>;
- ti,bit-shift = <0>;
- reg = <0x0f00>;
- ti,set-rate-parent;
+ /* CM_FCLKEN_CAM */
+ clock@f00 {
+ compatible = "ti,clksel";
+ reg = <0xf00>;
+ #clock-cells = <2>;
+ #address-cells = <0>;
+
+ cam_mclk: clock-cam-mclk {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clock-output-names = "cam_mclk";
+ clocks = <&dpll4_m5x2_ck>;
+ ti,bit-shift = <0>;
+ ti,set-rate-parent;
+ };
+
+ csi2_96m_fck: clock-csi2-96m-fck {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clock-output-names = "csi2_96m_fck";
+ clocks = <&core_96m_fck>;
+ ti,bit-shift = <1>;
+ };
};
cam_ick: cam_ick@f10 {
@@ -77,14 +93,6 @@
ti,bit-shift = <0>;
};
- csi2_96m_fck: csi2_96m_fck@f00 {
- #clock-cells = <0>;
- compatible = "ti,gate-clock";
- clocks = <&core_96m_fck>;
- reg = <0x0f00>;
- ti,bit-shift = <1>;
- };
-
security_l3_ick: security_l3_ick {
#clock-cells = <0>;
compatible = "fixed-factor-clock";