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| author | Arnd Bergmann <arnd@arndb.de> | 2015-04-15 21:35:22 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-04-15 21:41:13 +0200 |
| commit | 30ecc84eea691cfb0b731d71839bdcba88df5f75 (patch) | |
| tree | 831527106aaa10e5b13267275a843b50076fb4e5 /arch/arm/boot/dts/omap36xx.dtsi | |
| parent | Merge tag 'imx-dt-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawn... (diff) | |
| parent | ARM: dts: Update Nanobone dts file (diff) | |
| download | linux-30ecc84eea691cfb0b731d71839bdcba88df5f75.tar.xz linux-30ecc84eea691cfb0b731d71839bdcba88df5f75.zip | |
Merge branch 'omap/dt' into next/late
As pointed out by Stephen Rothwell, commit e52117638b79 ("ARM: dts:
omap3: Add DT entries for OMAP 3 ISP") conflicts with b8845074cfbb
("ARM: dts: omap3: add minimal l4 bus layout with control module support")
in non-obvious ways, causing a build failure when both patches
are present.
This merges the two branches that introduce the respective changes
into the next/late branch to resolve the way that Stephen suggested,
as confirmed by Tony.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.org/lkml/2015/4/6/436
Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap36xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap36xx.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 541704a59a5a..86253de5a97a 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -8,6 +8,8 @@ * kind, whether express or implied. */ +#include <dt-bindings/media/omap3-isp.h> + #include "omap3.dtsi" / { @@ -69,6 +71,21 @@ pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xff1f>; }; + + isp: isp@480bc000 { + compatible = "ti,omap3-isp"; + reg = <0x480bc000 0x12fc + 0x480bd800 0x0600>; + interrupts = <24>; + iommus = <&mmu_isp>; + syscon = <&scm_conf 0x2f0>; + ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>; + #clock-cells = <1>; + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; |