diff options
| author | Tony Lindgren <tony@atomide.com> | 2018-07-03 08:57:32 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2018-07-03 09:03:15 +0200 |
| commit | 731b409878a3b4387ce824f48228f4e161e20e1c (patch) | |
| tree | 995410564b974cde9be21eeee2c7cd51c5ccf13f /arch/arm/boot/dts/omap4-duovero-parlor.dts | |
| parent | ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt (diff) | |
| download | linux-731b409878a3b4387ce824f48228f4e161e20e1c.tar.xz linux-731b409878a3b4387ce824f48228f4e161e20e1c.zip | |
ARM: dts: Configure duovero for to allow core retention during idle
By reconfiguring few GPIOs in the dts file we can make duovero parlor
hit retention during idle:
1. Let's a larger debounce value for gpio-keys
This will then make gpio-keys use software debounce and the GPIO
debounce clock is not enabled.
2. Let's allow WLAN suspend for mwifiex
This can be done just by adding keep-power-in-suspend.
3. Let's reconfigure smsc911x driver to use GPIO edge interrupt
This will allow using NFSroot while the system idles, and the kernel
has quite a few dts files with "smsc,lan9115" compatible using edge
interrupts.
Then to have the system hit core retention during idle, the UARTs
needs to be idled and USB modules need to be unloaded or unbound.
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap4-duovero-parlor.dts')
| -rw-r--r-- | arch/arm/boot/dts/omap4-duovero-parlor.dts | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap4-duovero-parlor.dts b/arch/arm/boot/dts/omap4-duovero-parlor.dts index a9a584b5b955..cfcac0d73851 100644 --- a/arch/arm/boot/dts/omap4-duovero-parlor.dts +++ b/arch/arm/boot/dts/omap4-duovero-parlor.dts @@ -36,6 +36,8 @@ label = "button0"; linux,code = <BTN_0>; gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */ + /* Value above 7.95ms for no GPIO hardware debounce */ + debounce-interval = <10>; wakeup-source; }; }; @@ -140,7 +142,7 @@ ethernet@gpmc { reg = <5 0 0xff>; interrupt-parent = <&gpio2>; - interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */ + interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */ phy-mode = "mii"; |