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authorSuman Anna <s-anna@ti.com>2020-07-10 01:19:48 +0200
committerTony Lindgren <tony@atomide.com>2020-07-13 20:11:40 +0200
commit7f7d771c00bf65d18a3e30e983b4061a418efbf4 (patch)
treef676ef813ea6c1e810618d3a79d80c4e559ec21d /arch/arm/boot/dts/omap5.dtsi
parentARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP (diff)
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ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. The following DMTimers are chosen: IPU : GPT3 (SMP-mode) DSP : GPT5 IPU has two Cortex-M3 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. The timers are optional, but are mandatory to support device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, alongside equivalent changes on the firmware side. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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