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authorJon Hunter <jon-hunter@ti.com>2012-11-01 14:57:08 +0100
committerBenoit Cousson <b-cousson@ti.com>2012-11-01 17:03:31 +0100
commitd03a93bbec5edfe33f09d629d27c1afd50f043aa (patch)
tree7de8ac7f89e16d65e6b986c5134bf848421bea5f /arch/arm/boot/dts/omap5.dtsi
parentARM: dts: AM33XX: Add SPI node (diff)
downloadlinux-d03a93bbec5edfe33f09d629d27c1afd50f043aa.tar.xz
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ARM: dts: OMAP4: Update timer addresses
For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
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