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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-08-29 15:31:04 +0200
committerBenoit Cousson <b-cousson@ti.com>2012-09-07 19:22:56 +0200
commitffd5db24e7491135da12d73244d6974153f4765f (patch)
treef7f4efd319f28f23389c3d75b70cffd71463fc87 /arch/arm/boot/dts/omap5.dtsi
parentARM: dts: omap4: Add reg-names for McPDM and DMIC (diff)
downloadlinux-ffd5db24e7491135da12d73244d6974153f4765f.tar.xz
linux-ffd5db24e7491135da12d73244d6974153f4765f.zip
ARM: dts: omap5: Add McBSP entries
Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c11ae1975cc..aa97e9318def 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -251,5 +251,41 @@
compatible = "ti,omap4-keypad";
ti,hwmods = "kbd";
};
+
+ mcbsp1: mcbsp@40122000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40122000 0xff>, /* MPU private access */
+ <0x49022000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 17 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@40124000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40124000 0xff>, /* MPU private access */
+ <0x49024000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 22 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@40126000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40126000 0xff>, /* MPU private access */
+ <0x49026000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 23 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
};
};