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authorCristian Ciocaltea <cristian.ciocaltea@gmail.com>2020-12-29 22:17:17 +0100
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2020-12-31 08:35:06 +0100
commit11bc96ba758bf05a8048522d477c5953176132c9 (patch)
tree340014c5802330bb0e1d4ed408c4c4af32482e31 /arch/arm/boot/dts/owl-s500-sparky.dts
parentarm: dts: owl-s500: Add Clock Management Unit (diff)
downloadlinux-11bc96ba758bf05a8048522d477c5953176132c9.tar.xz
linux-11bc96ba758bf05a8048522d477c5953176132c9.zip
arm: dts: owl-s500: Set CMU clocks for UARTs
Set Clock Management Unit clocks for the UART nodes of Actions Semi S500 SoCs and remove the dummy "uart2_clk" and "uart3_clk" fixed clocks. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/owl-s500-sparky.dts')
-rw-r--r--arch/arm/boot/dts/owl-s500-sparky.dts7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/owl-s500-sparky.dts b/arch/arm/boot/dts/owl-s500-sparky.dts
index c665ce8b88b4..9d8f7336bec0 100644
--- a/arch/arm/boot/dts/owl-s500-sparky.dts
+++ b/arch/arm/boot/dts/owl-s500-sparky.dts
@@ -25,12 +25,6 @@
device_type = "memory";
reg = <0x0 0x40000000>; /* 1 or 2 GiB */
};
-
- uart3_clk: uart3-clk {
- compatible = "fixed-clock";
- clock-frequency = <921600>;
- #clock-cells = <0>;
- };
};
&timer {
@@ -39,5 +33,4 @@
&uart3 {
status = "okay";
- clocks = <&uart3_clk>;
};