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authorAndrew Jeffery <andrew@aj.id.au>2021-06-28 03:36:05 +0200
committerJoel Stanley <joel@jms.id.au>2021-07-01 06:07:12 +0200
commitfaffd1b2bde3ee428d6891961f6a60f8e08749d6 (patch)
treed52c9828d47a2948952dec9e12463e02f121efd4 /arch/arm/boot/dts/pm9g45.dts
parentARM: dts: tacoma: Add phase corrections for eMMC (diff)
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ARM: dts: everest: Add phase corrections for eMMC
The values were determined experimentally via boot tests, not by measuring the bus behaviour with a scope. We plan to do scope measurements to confirm or refine the values and will update the devicetree if necessary once these have been obtained. However, with the patch we can write and read data without issue, where as booting the system without the patch failed at the point of mounting the rootfs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210628013605.1257346-1-andrew@aj.id.au Fixes: 2fc88f92359d ("mmc: sdhci-of-aspeed: Expose clock phase controls") Fixes: a5c5168478d7 ("ARM: dts: aspeed: Add Everest BMC machine") Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/pm9g45.dts')
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