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author | Xianglong Du <Xianglong.Du@csr.com> | 2013-07-04 00:08:04 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-04 01:08:01 +0200 |
commit | e88b815e011bcacb7066f1156ce390f6b0adc9df (patch) | |
tree | 99f50a40cdb0d506885be516f5a2abea4c164fd5 /arch/arm/boot/dts/prima2.dtsi | |
parent | drivers/rtc/rtc-ds1216.c: use module_platform_driver_probe() (diff) | |
download | linux-e88b815e011bcacb7066f1156ce390f6b0adc9df.tar.xz linux-e88b815e011bcacb7066f1156ce390f6b0adc9df.zip |
drivers/rtc/rtc-sirfsoc.c: add rtc drivers for CSR SiRFprimaII and SiRFatlasVI
On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider
(RTC_DIV) that divides the input 32.768KHz clock to the frequency that
users need (E.g. 1 Hz). The divided real-time clock will be used to
drive a 32-bit counter (RTC_COUNTER) that provides users with the actual
time.
In each cycle of the divided real-time clock, there is a Hertz interrupt
generated to the RISC. Users can also configure an alarm (RTC_ALARM).
When RTC_COUNTER matches the alarm, there will be an alarm interrupt
generated to the RISC.
The system RTC can generate an alarm wake-up signal to notify the power
controller to wake up from power saving mode.
Signed-off-by: Xianglong Du <Xianglong.Du@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/boot/dts/prima2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/prima2.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index 02edd8965f8a..05e9489cf95c 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -610,7 +610,7 @@ }; rtc-iobg { - compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus"; + compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x80030000 0x10000>; |