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author | Jiri Kosina <jkosina@suse.cz> | 2014-02-20 14:54:28 +0100 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2014-02-20 14:54:28 +0100 |
commit | d4263348f796f29546f90802177865dd4379dd0a (patch) | |
tree | adcbdaebae584eee2f32fab95e826e8e49eef385 /arch/arm/boot/dts/prima2.dtsi | |
parent | Documentation: update URL to hfsplus Technote 1150 (diff) | |
parent | Linux 3.14-rc3 (diff) | |
download | linux-d4263348f796f29546f90802177865dd4379dd0a.tar.xz linux-d4263348f796f29546f90802177865dd4379dd0a.zip |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/boot/dts/prima2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/prima2.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index daee58944e15..0e219932d7cc 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -29,6 +29,15 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + clocks = <&clks 12>; + operating-points = < + /* kHz uV */ + 200000 1025000 + 400000 1025000 + 664000 1050000 + 800000 1100000 + >; + clock-latency = <150000>; }; }; @@ -80,6 +89,7 @@ cphifbg@88030000 { compatible = "sirf,prima2-cphifbg"; reg = <0x88030000 0x1000>; + clocks = <&clks 42>; }; }; @@ -540,6 +550,18 @@ "usp0_uart_nostreamctrl"; }; }; + usp0_only_utfs_pins_a: usp0@2 { + usp0 { + sirf,pins = "usp0_only_utfs_grp"; + sirf,function = "usp0_only_utfs"; + }; + }; + usp0_only_urfs_pins_a: usp0@3 { + usp0 { + sirf,pins = "usp0_only_urfs_grp"; + sirf,function = "usp0_only_urfs"; + }; + }; usp1_pins_a: usp1@0 { usp1 { sirf,pins = "usp1grp"; @@ -648,6 +670,9 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56000000 0x100000>; interrupts = <38>; + status = "disabled"; + bus-width = <8>; + clocks = <&clks 36>; }; sd1: sdhci@56100000 { @@ -655,6 +680,9 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56100000 0x100000>; interrupts = <38>; + status = "disabled"; + bus-width = <4>; + clocks = <&clks 36>; }; sd2: sdhci@56200000 { @@ -662,6 +690,8 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56200000 0x100000>; interrupts = <23>; + status = "disabled"; + clocks = <&clks 37>; }; sd3: sdhci@56300000 { @@ -669,6 +699,8 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56300000 0x100000>; interrupts = <23>; + status = "disabled"; + clocks = <&clks 37>; }; sd4: sdhci@56400000 { @@ -676,6 +708,8 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56400000 0x100000>; interrupts = <39>; + status = "disabled"; + clocks = <&clks 38>; }; sd5: sdhci@56500000 { @@ -683,6 +717,7 @@ compatible = "sirf,prima2-sdhc"; reg = <0x56500000 0x100000>; interrupts = <39>; + clocks = <&clks 38>; }; pci-copy@57900000 { @@ -716,6 +751,12 @@ interrupts = <52 53 54>; }; + minigpsrtc@2000 { + compatible = "sirf,prima2-minigpsrtc"; + reg = <0x2000 0x1000>; + interrupts = <54>; + }; + pwrc@3000 { compatible = "sirf,prima2-pwrc"; reg = <0x3000 0x1000>; |