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| author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2012-03-01 06:26:15 +0100 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-03-07 02:32:40 +0100 |
| commit | 10d77ec21a748e7ddaf6410bd08959769764520c (patch) | |
| tree | 4a34b6ce63391af2f3778fad972e16e64634b4bf /arch/arm/boot/dts/pxa168.dtsi | |
| parent | ARM: mmp: append OF support on pxa168 (diff) | |
| download | linux-10d77ec21a748e7ddaf6410bd08959769764520c.tar.xz linux-10d77ec21a748e7ddaf6410bd08959769764520c.zip | |
ARM: dts: append DTS file of pxa168
DTS files of both PXA168 and aspenite are appended.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/pxa168.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/pxa168.dtsi | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi new file mode 100644 index 000000000000..d32d5128f225 --- /dev/null +++ b/arch/arm/boot/dts/pxa168.dtsi @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2012 Marvell Technology Group Ltd. + * Author: Haojian Zhuang <haojian.zhuang@marvell.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ + +/include/ "skeleton.dtsi" + +/ { + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + i2c0 = &twsi1; + i2c1 = &twsi2; + }; + + intc: intc-interrupt-controller@d4282000 { + compatible = "mrvl,mmp-intc", "mrvl,intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xd4282000 0x1000>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&intc>; + ranges; + + apb@d4000000 { /* APB */ + compatible = "mrvl,apb-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xd4000000 0x00200000>; + ranges; + + uart1: uart@d4017000 { + compatible = "mrvl,mmp-uart", "mrvl,pxa-uart"; + reg = <0xd4017000 0x1000>; + interrupts = <27>; + status = "disabled"; + }; + + uart2: uart@d4018000 { + compatible = "mrvl,mmp-uart", "mrvl,pxa-uart"; + reg = <0xd4018000 0x1000>; + interrupts = <28>; + status = "disabled"; + }; + + uart3: uart@d4026000 { + compatible = "mrvl,mmp-uart", "mrvl,pxa-uart"; + reg = <0xd4026000 0x1000>; + interrupts = <29>; + status = "disabled"; + }; + + gpio: gpio@d4019000 { + compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio"; + reg = <0xd4019000 0x1000>; + interrupts = <49>; + interrupt-names = "gpio_mux"; + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + twsi1: i2c@d4011000 { + compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; + reg = <0xd4011000 0x1000>; + interrupts = <7>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + twsi2: i2c@d4025000 { + compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; + reg = <0xd4025000 0x1000>; + interrupts = <58>; + status = "disabled"; + }; + + rtc: rtc@d4010000 { + compatible = "mrvl,mmp-rtc"; + reg = <0xd4010000 0x1000>; + interrupts = <5 6>; + interrupt-names = "rtc 1Hz", "rtc alarm"; + status = "disabled"; + }; + }; + }; +}; |