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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2022-05-06 17:21:05 +0200
committerBjorn Andersson <andersson@kernel.org>2022-08-29 23:16:11 +0200
commitf9aad4f098dc81b5859c27bfcf441cff418002a4 (patch)
treef0fcad97da43eda8b8891c420072a028cddd3381 /arch/arm/boot/dts/qcom-apq8064.dtsi
parentARM: dts: qcom: msm8974: add rpm-stats device node (diff)
downloadlinux-f9aad4f098dc81b5859c27bfcf441cff418002a4.tar.xz
linux-f9aad4f098dc81b5859c27bfcf441cff418002a4.zip
ARM: dts: qcom: stop using snps,dw-pcie falback
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie. Unlike the generic IP core, they have special requirements regarding enabling clocks, toggling resets, using the PHY, etc. This is not to mention that platform snps-dw-pcie driver expects to find two IRQs declared, while Qualcomm platforms use just one. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220506152107.1527552-7-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index ada4c828bf2f..257fcd497f86 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1384,7 +1384,7 @@
};
pcie: pci@1b500000 {
- compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
+ compatible = "qcom,pcie-apq8064";
reg = <0x1b500000 0x1000>,
<0x1b502000 0x80>,
<0x1b600000 0x100>,