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authorMatthias Kaehlcke <mka@chromium.org>2018-12-20 00:55:28 +0100
committerAndy Gross <agross@kernel.org>2019-04-26 06:22:26 +0200
commit6969d1d9c61524d3ce492cfdca92d5dfa51e2e54 (patch)
treed7cf95198ddd9849185622ae4c7cc18bdd0bfb2b /arch/arm/boot/dts/qcom-apq8064.dtsi
parentARM: dts: qcom: ipq4019: enlarge PCIe BAR range (diff)
downloadlinux-6969d1d9c61524d3ce492cfdca92d5dfa51e2e54.tar.xz
linux-6969d1d9c61524d3ce492cfdca92d5dfa51e2e54.zip
ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
Add 'xo_board' as ref clock for the DSI PHY, it was previously hardcoded in the PLL 'driver' for the 28nm 8960 PHY. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <agross@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 8ca89c79bd0e..65975df6a8c3 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1303,8 +1303,9 @@
<0x04700300 0x200>,
<0x04700500 0x5c>;
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
- clock-names = "iface_clk";
- clocks = <&mmcc DSI_M_AHB_CLK>;
+ clock-names = "iface_clk", "ref";
+ clocks = <&mmcc DSI_M_AHB_CLK>,
+ <&cxo_board>;
};