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| author | Georgi Djakov <gdjakov@mm-sol.com> | 2014-09-03 18:50:31 +0200 |
|---|---|---|
| committer | Kumar Gala <galak@codeaurora.org> | 2014-09-11 18:14:00 +0200 |
| commit | 66c04e30f4a6e6ed998a6c154a6c45b3cd5b3fde (patch) | |
| tree | 0abeea5f5fed13b3349f28d1ace99d9de231c0c0 /arch/arm/boot/dts/qcom-apq8084.dtsi | |
| parent | ARM: dts: msm: Add 8058 PMIC to ssbi bus (diff) | |
| download | linux-66c04e30f4a6e6ed998a6c154a6c45b3cd5b3fde.tar.xz linux-66c04e30f4a6e6ed998a6c154a6c45b3cd5b3fde.zip | |
ARM: dts: qcom: Add initial IFC6540 board device tree
Add basic support for the IFC6540 single-board computer boards, that are
based on the APQ8084 SoC. This patch adds the initial device tree and the
neccessary nodes required for enabling the serial port and eMMC.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8084.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index b5b156e328a0..b9ac63cfe9e6 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -3,6 +3,7 @@ #include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-apq8084.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Qualcomm APQ 8084"; @@ -193,5 +194,27 @@ clock-names = "core", "iface"; status = "disabled"; }; + + sdhci@f9824900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 123 0>, <0 138 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + sdhci@f98a4900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 125 0>, <0 221 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; }; }; |