diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-07-12 16:42:44 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-09-14 05:11:30 +0200 |
| commit | 5eb82ddb7273bd34a36c05df271f34919eeea675 (patch) | |
| tree | 99482306b0df548fbad174bf8ccd673d85221e0d /arch/arm/boot/dts/qcom-apq8084.dtsi | |
| parent | ARM: dts: qcom: msm8960: add clocks to the MMCC device node (diff) | |
| download | linux-5eb82ddb7273bd34a36c05df271f34919eeea675.tar.xz linux-5eb82ddb7273bd34a36c05df271f34919eeea675.zip | |
ARM: dts: qcom: align SDHCI reg-names with DT schema
DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
just like TXT bindings were expecting before the conversion.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-5-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8084.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 0e559626f831..1c8d3bdc8fff 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -422,7 +422,7 @@ mmc@f9824900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC1_APPS_CLK>, @@ -435,7 +435,7 @@ mmc@f98a4900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC2_APPS_CLK>, |