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| author | Sricharan R <sricharan@codeaurora.org> | 2018-08-03 16:10:17 +0200 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2018-09-13 21:49:38 +0200 |
| commit | 2e7a2c91019c5dfa7279bdcf29b23ebab2c91b1d (patch) | |
| tree | b27a7ec686505d3e936cfae02bba20c239798cd2 /arch/arm/boot/dts/qcom-ipq8064-ap148.dts | |
| parent | ARM: dts: qcom: Add sdcc nodes for ipq8064 (diff) | |
| download | linux-2e7a2c91019c5dfa7279bdcf29b23ebab2c91b1d.tar.xz linux-2e7a2c91019c5dfa7279bdcf29b23ebab2c91b1d.zip | |
ARM: dts: qcom: Move common nodes to ipq8064-v.1.0.dtsi
The nodes in ipq8064-ap148.dts currently are common with
boards that we will add next. So move the common data to
ipq8064-v.1.0.dtsi.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-ipq8064-ap148.dts')
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 83 |
1 files changed, 3 insertions, 80 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index bcf53e37ed93..f45b05e941b4 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -2,26 +2,8 @@ #include "qcom-ipq8064-v1.0.dtsi" / { - model = "Qualcomm IPQ8064/AP148"; - compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; - - aliases { - serial0 = &gsbi4_serial; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; + model = "Qualcomm Technologies, Inc. IPQ8064/AP-148"; + compatible = "qcom,ipq8064-ap148"; soc { pinmux@800000 { @@ -30,74 +12,15 @@ function = "gsbi4"; bias-disable; }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - drive-strength = <10>; - bias-none; - }; - }; }; gsbi@16300000 { - qcom,mode = <GSBI_PROT_I2C_UART>; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - - i2c4: i2c@16380000 { + i2c@16380000 { status = "ok"; - clock-frequency = <200000>; - pinctrl-0 = <&i2c4_pins>; pinctrl-names = "default"; }; }; - - gsbi5: gsbi@1a200000 { - qcom,mode = <GSBI_PROT_SPI>; - status = "ok"; - - spi4: spi@1a280000 { - status = "ok"; - spi-max-frequency = <50000000>; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 0>; - - flash: m25p80@0 { - compatible = "s25fl256s1"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - partition@0 { - label = "rootfs"; - reg = <0x0 0x1000000>; - }; - - partition@1 { - label = "scratch"; - reg = <0x1000000 0x1000000>; - }; - }; - }; - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - ports-implemented = <0x1>; - status = "ok"; - }; }; }; |