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author | Kenneth Westfield <kwestfie@codeaurora.org> | 2015-03-13 09:01:08 +0100 |
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committer | Olof Johansson <olof@lixom.net> | 2015-04-03 22:33:49 +0200 |
commit | f49cadeb48a2717d1baaab701066bda9b69cfed4 (patch) | |
tree | 10b14237ddfdaaba5667b75be8b6a46aa7c73356 /arch/arm/boot/dts/qcom-ipq8064.dtsi | |
parent | arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes (diff) | |
download | linux-f49cadeb48a2717d1baaab701066bda9b69cfed4.tar.xz linux-f49cadeb48a2717d1baaab701066bda9b69cfed4.zip |
arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/qcom-ipq8064.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-ipq8064.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 5afaff950c89..1bc5fdd0e4b3 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -2,6 +2,7 @@ #include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-ipq806x.h> +#include <dt-bindings/clock/qcom,lcc-ipq806x.h> #include <dt-bindings/soc/qcom,gsbi.h> / { @@ -66,6 +67,21 @@ ranges; compatible = "simple-bus"; + lpass@28100000 { + compatible = "qcom,lpass-cpu"; + status = "disabled"; + clocks = <&lcc AHBIX_CLK>, + <&lcc MI2S_OSR_CLK>, + <&lcc MI2S_BIT_CLK>; + clock-names = "ahbix-clk", + "mi2s-osr-clk", + "mi2s-bit-clk"; + interrupts = <0 85 1>; + interrupt-names = "lpass-irq-lpaif"; + reg = <0x28100000 0x10000>; + reg-names = "lpass-lpaif"; + }; + qcom_pinmux: pinmux@800000 { compatible = "qcom,ipq8064-pinctrl"; reg = <0x800000 0x4000>; |