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authorDouglas Anderson <dianders@chromium.org>2018-11-05 22:09:20 +0100
committerAndy Gross <andy.gross@linaro.org>2018-11-29 00:25:42 +0100
commit28d13d317bacd7b5316a8bd21488e9850b8e84c1 (patch)
tree4b35bbccc680429782c207041f373f1909cf756c /arch/arm/boot/dts/qcom-msm8974.dtsi
parentARM: dts: qcom: msm8974-hammerhead: correct gpios property on magnetometer (diff)
downloadlinux-28d13d317bacd7b5316a8bd21488e9850b8e84c1.tar.xz
linux-28d13d317bacd7b5316a8bd21488e9850b8e84c1.zip
ARM: dts: qcom: Add SoC-specific string for sdhci-msm-v4 nodes
As per upstream discussion [1], we should have an SoC-specific compatible string for Qualcomm's SDHCI nodes. Let's add it. [1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index c3470f9ec747..ca266a5f021d 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -604,7 +604,7 @@
};
sdhci@f9824900 {
- compatible = "qcom,sdhci-msm-v4";
+ compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
@@ -618,7 +618,7 @@
};
sdhci@f9864900 {
- compatible = "qcom,sdhci-msm-v4";
+ compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
@@ -632,7 +632,7 @@
};
sdhci@f98a4900 {
- compatible = "qcom,sdhci-msm-v4";
+ compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,