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authorAlex Elder <elder@linaro.org>2021-12-10 23:31:22 +0100
committerDavid S. Miller <davem@davemloft.net>2021-12-13 13:49:26 +0100
commitc0d6316c238b1bd743108bd4b08eda364f47c7c9 (patch)
tree7db75138eb8c8ac4470b2a5e81bd1a94bcb7b611 /arch/arm/boot/dts/qcom-sdx55.dtsi
parentnet: Enable max_dgram_qlen unix sysctl to be configurable by non-init user na... (diff)
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ARM: dts: qcom: sdx55: fix IPA interconnect definitions
The first two interconnects defined for IPA on the SDX55 SoC are really two parts of what should be represented as a single path between IPA and system memory. Fix this by combining the "memory-a" and "memory-b" interconnects into a single "memory" interconnect. Reported-by: David Heidelberg <david@ixit.cz> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm/boot/dts/qcom-sdx55.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-sdx55.dtsi6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 44526ad9d210..eee2f63b9bba 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -333,12 +333,10 @@
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
- interconnects = <&system_noc MASTER_IPA &system_noc SLAVE_SNOC_MEM_NOC_GC>,
- <&mem_noc MASTER_SNOC_GC_MEM_NOC &mc_virt SLAVE_EBI_CH0>,
+ interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI_CH0>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_IPA_CFG>;
- interconnect-names = "memory-a",
- "memory-b",
+ interconnect-names = "memory",
"imem",
"config";