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| author | Chris Brandt <chris.brandt@renesas.com> | 2017-03-30 23:16:09 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-04-03 12:16:35 +0200 |
| commit | 91a7c50cb4fabfba218549dfa84356069918bfbf (patch) | |
| tree | 4c6689c8c771aaf86cd6a4317f55d51e4324fc72 /arch/arm/boot/dts/r7s72100.dtsi | |
| parent | ARM: dts: silk: Correct clock of DU1 (diff) | |
| download | linux-91a7c50cb4fabfba218549dfa84356069918bfbf.tar.xz linux-91a7c50cb4fabfba218549dfa84356069918bfbf.zip | |
ARM: dts: r7s72100: fix ethernet clock parent
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 9fb2e510958a..47ef53a4c8bf 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -121,7 +121,7 @@ #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xfcfe0430 4>; - clocks = <&p0_clk>; + clocks = <&b_clk>; clock-indices = <R7S72100_CLK_ETHER>; clock-output-names = "ether"; }; |