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author | Chris Brandt <chris.brandt@renesas.com> | 2016-09-02 03:40:11 +0200 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2016-09-05 14:32:39 +0200 |
commit | e54824019155a609eb3547ce07721c96d9e790ac (patch) | |
tree | d9e75538cf081750f55f178c25499675984e80cf /arch/arm/boot/dts/r7s72100.dtsi | |
parent | ARM: dts: r7s72100: add ethernet clock to device tree (diff) | |
download | linux-e54824019155a609eb3547ce07721c96d9e790ac.tar.xz linux-e54824019155a609eb3547ce07721c96d9e790ac.zip |
ARM: dts: r7s72100: add ethernet to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 6d29e8ffa0d9..fb9ef9ca120e 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -428,4 +428,17 @@ power-domains = <&cpg_clocks>; status = "disabled"; }; + + ether: ethernet@e8203000 { + compatible = "renesas,ether-r7s72100"; + reg = <0xe8203000 0x800>, + <0xe8204800 0x200>; + interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp7_clks R7S72100_CLK_ETHER>; + power-domains = <&cpg_clocks>; + phy-mode = "mii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; |