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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2020-08-25 18:27:15 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-09-04 09:48:41 +0200
commita0be3c32b15675e9f9dc0d3dc4e0361c019b93d8 (patch)
tree7cf119738fd7799dfdb5a0e8457806360850ff6b /arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
parentARM: dts: r8a7742: Add IPMMU DT nodes (diff)
downloadlinux-a0be3c32b15675e9f9dc0d3dc4e0361c019b93d8.tar.xz
linux-a0be3c32b15675e9f9dc0d3dc4e0361c019b93d8.zip
ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
Enable PCIe Controller and set PCIe bus clock frequency. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200825162718.5838-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r8a7742-iwg21d-q7.dts')
-rw-r--r--arch/arm/boot/dts/r8a7742-iwg21d-q7.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index b3461a61a4bf..df85e516a3c0 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -159,6 +159,18 @@
/* status = "okay"; */
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec {
+ /* SW2[6] determines which connector is activated
+ * ON = PCIe X4 (connector-J7)
+ * OFF = mini-PCIe (connector-J26)
+ */
+ status = "okay";
+};
+
&pfc {
avb_pins: avb {
groups = "avb_mdio", "avb_gmii";