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author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2020-08-06 20:31:52 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-08-17 09:46:33 +0200 |
commit | 02b24822953571d3ef83029e53bcd011d39dcb39 (patch) | |
tree | 9433026df31970f9b229d56b9bb0aa7987cebcec /arch/arm/boot/dts/r8a7742.dtsi | |
parent | ARM: dts: r8a7742: Add PWM SoC support (diff) | |
download | linux-02b24822953571d3ef83029e53bcd011d39dcb39.tar.xz linux-02b24822953571d3ef83029e53bcd011d39dcb39.zip |
ARM: dts: r8a7742: Add TPU support
Add TPU support to R8A7742 SoC DT.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/20200806183152.11809-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r8a7742.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r8a7742.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index 41c89e04cf17..4a8d27dff9f7 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -328,6 +328,17 @@ reg = <0 0xe6060000 0 0x250>; }; + tpu: pwm@e60f0000 { + compatible = "renesas,tpu-r8a7742", "renesas,tpu"; + reg = <0 0xe60f0000 0 0x148>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a7742-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; |