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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-13 17:41:10 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-20 16:36:59 +0100 |
| commit | c2e952ef5abb8054140e85eb4f54972a197d4673 (patch) | |
| tree | 656fda6b31615d6444f607b6b19abf3a114494da /arch/arm/boot/dts/r8a7778.dtsi | |
| parent | ARM: dts: renesas: Group tuples in regulator-gpio states properties (diff) | |
| download | linux-c2e952ef5abb8054140e85eb4f54972a197d4673.tar.xz linux-c2e952ef5abb8054140e85eb4f54972a197d4673.zip | |
ARM: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped. While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property, leading
to warnings like:
pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long
pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long
Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Diffstat (limited to 'arch/arm/boot/dts/r8a7778.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7778.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 10d996d2941f..2be4c54ba067 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -79,10 +79,10 @@ <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; sense-bitfield-width = <2>; }; |